10.1184/R1/6720500.v1 Naser Naserifar Naser Naserifar Material Gradients in Thin Stretchable Substrates for Wearable Electronics Carnegie Mellon University 2016 Mechanical Engineering 2016-08-01 00:00:00 Thesis https://kilthub.cmu.edu/articles/thesis/Material_Gradients_in_Thin_Stretchable_Substrates_for_Wearable_Electronics/6720500 <p>Stretchable electronics garners attention for its promise in unobtrusive wearable systems for health monitoring and potentially for medical therapy. One significant question though is whether to develop holistic stretchable electronics where the process steps for electronic and mechanical functions are interwoven, or to integrate mature CMOS into stretchable electronic substrates where the CMOS process is separate from mechanical process steps. A major limitation with integrating CMOS is the interface between the soft and hard materials when introduced into functional systems. To address this, we have developed a new platform for stretchable electronics with the ability to embed hard CMOS based substrates that are prevalent in electronic and sensing devices. Through integrating and connecting small CMOS chips spread through an elastomeric substrate, the final system will have highly functional electronic attributes, while being stretchable because of the high percentage of low modulus elastomers. However, in general, delamination readily occurs when a stretchable substrate with embedded thinned chips is strained. We have developed an approach to control the elasticity of the polymer layers around the hard materials associated with CMOS electronic parts to create a controllable material stiffness gradient interfacing a highly rigid material to the soft stretchable system. This approach enables a thin stretchable system that adheres to the skin, but has hard CMOS based materials distributed through its matrix. Our coupled computational and experimental approach reveals that adding just one controlled layer in the material gradient results in a 5.5 times increase in the strain failure threshold. This huge increase in strain failure threshold decreases the risk of delamination. Also, we have developed an approach to pattern an elastomeric polymer layer with spatially varying mechanical properties around CMOS electronics to create a controllable material stiffness gradient. Our experimental approach reveals that modifying the interfaces can increase the strain failure threshold up to 30% and subsequently decreases delamination. The stiffness gradient in the v polymer layer provides a safe region for electronic chips to function under a substrate tensile strain up to 150%. These results will have impacts in diverse applications including skin sensors and wearable health monitoring systems.</p>