Carnegie Mellon University
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EPSL: Executable Protocol Specification Language

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journal contribution
posted on 2001-09-01, 00:00 authored by Edmund M Clarke, Yuan Lu, Helmut Veith, Dong Wang
The verification of bus protocols, i.e., of communication protocols between hardware devices as in the case of the well-known PCI bus, is a central problem in hardware verification. Although bus protocol design and verification become increasingly important due to the integration of diverse components in IP Core-based designs, even standard bus protocols are usually specified in English which makes specifications often ambiguous, contradictory and certainly non-executable.


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© ACM, 2001. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution.



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