Phase Change nanoelectromechanical (NEM) Relay for Nonvolatile, High Density Memory Application

Over the last five decades, complementary metal oxide semiconductors (CMOS) have dominated all aspects of computing from logic to memory by aggressively reducing transistor size. The associated advances have led to the complex, high speed, and efficient computers of today. With each process node, such scaling becomes more demanding and is expected to reach its limit soon. Scaling in terms of device density will continue through 3D fabrication methods. However, this increases the number of devices per area, but does not improve the power efficiency of an individual device. Novel applications, such as internet of things (IoT), wearable electronics, and brain-inspired computing have generated increased demand for ultra-low-power systems. A number of emerging technologies are being developed as ways to augment or replace CMOS for these energy-constrained applications. Among these emerging memory technologies resistive, phase changing and magnetic memory devices have garnered the most attention due to their potential as high density storage class memory. While all of these technologies exhibit some degree of nonvolatility, they often suffer from low ON-OFF ratio, high leakage, and poor scalability. 

In this dissertation we present the design, characterization, and fabrication process of a nanoscale phase change Nano Electro Mechanical (NEM) switching device that integrates the high ON-OFF ratio of NEM architecture with the nonvolatility of phase change chalcogenides. While the idea of a scalable NEM device based on phase change materials had been proposed before, this work describes its first implementation at the nanoscale. A novel device design, resembling that of a FinFET, is proposed to develop a laterally actuating and highly scalable NEM relay. A large part of this research is devoted towards the development of fabrication processes that integrate multiple vertical sidewall layers around a fin-shaped structure. We have achieved record performance in a 300 nm long prototype FinPCNR device, which actuates at 0.3 V and offers potential for further scaling. In the OFF state, the metal electrodes are separated from the channel by a sub-5 nm airgap, resulting in <30 fA leakage current and 8 orders of magnitude ON-OFF ratio. We have also demonstrated how the application of FinPCNR can significantly improve performance in parallelly addressable memory arrays.