Study of the Crystallization Dynamics and Threshold Voltage of Phase Change Materials for Use in Reconfigurable RF Switches and Non-volatile Memories
Chalcogenide phase change (PC) materials can be reversibly transformed between the high resistivity (~ 1 Ω∙m) amorphous state (OFF-state) and low resistivity (~ 10-6 Ω∙m) crystalline state (ON-state) thermally, both are stable at the room temperature. This makes them well suited as reconfigurable RF switches and non-volatile memories. This work will present the understandings of two key characteristics of PC materials, the crystallization dynamics and the threshold voltage (Vth), as they determine performance limitations in these applications. Crystallization dynamics describe the correlations of the states, temperature and time; the Vth is the trigger of the threshold switching which leads to the “break down” of PC materials from OFF-state to ON-state. The four-terminal indirectly-heated RF switches with high cut-off frequency (> 5 THz) has advantages over other technologies but its programming power (~ 1.5 W) is yet to be reduced. Measuring the maximum allowed RESET quench time in the crystallization dynamics is critical for designing low power switches. As a major contribution, this work provides a universal methodology for accurate heater thermometry and in-situ crystallization measurements for this study. On the other hand, understanding the Vth is essential for high power handling applications as it determines the maximum power that an OFF-state switch can withstand without being spontaneously turned on. This work will discuss new observations and learnings from Vth measurements including the geometry dependent Vth variations which provide insights into the threshold switching mechanism. Unlike RF switches, faster crystallization is desired for memories to improve the write speed. The non-Arrhenius crystallization needs to be explored to achieve short crystallization time (< 10 ns) at high temperature (> 700 K). As another major contribution, this work will present a nano-scale (~ 100 nm) high-speed (thermal time constant < 5 ns) PC device for assessing the crystallization time in this regime, and provide a comprehensive learning for the crystallization dynamics from 300 K to 1000 K by developing a unified framework based on the fragility model and growth-dominated crystallization. This can be used to accurately simulate the crystallization process for any device geometry and estimate the RF switches power and Vth.